Semiconductor wafer and production method therefor

ABSTRACT

A method for producing a semiconductor wafer that yields a wafer having high flatness and back surface characteristics to address problems concerning the back surface of a wafer produced by the conventional surface grinding/double side polishing method and observed during the production process. The method comprises flattening both sides of the wafer by surface grinding means, eliminating a mechanically damaged layer by an etching treatment, and then subjecting a front surface of the wafer to a single side polishing treatment, wherein a back surface of the wafer has glossiness in a range of 20-80%.

TECHNICAL FIELD

The present invention relates to a method for producing a semiconductorwafer, in particular, a single crystal silicon wafer.

BACKGROUND ART

Conventional methods for producing semiconductor wafers generallycomprise, as shown in Process III of FIG. 10 (henceforth this process isalso referred to as “lapping/single side polishing method”), a slicingstep to obtain a wafer of thin disc shape by slicing a single crystalsilicon ingot pulled in a single crystal pulling apparatus; a chamferingstep to chamfer a peripheral edge portion of the sliced wafer to preventcracking or breakage of the wafer; a lapping step to flatten the surfaceof the chamfered wafer; a wet etching step to remove a mechanicallydamaged layer of the wafer remained after the chamfering and thelapping; a single side polishing step to finish one side of the etchedwafer so that the wafer should have a mirror surface; and a cleaningstep to clean the polished wafer to remove the polishing agent or dustparticles remained on the wafer to improve the cleanliness of the wafer.

In view of recent use of semiconductors of higher functionality orhigher performance, extremely smaller size, lighter weight and higherintegration degree, higher quality and lower cost of base materialwafers have been pursued. However, it is difficult to obtain flatnesswith high precision for wafers having, in particular, a large diameterof 200-300 mm or more, and reduction of production costs has almostreached its limitation.

Therefore, methods for processing wafers that can realize higherflatness and lower cost for the next generation have been activelydeveloped. For example, there has been proposed a production methodutilizing a combination of surface grinding and double side polishing(see Japanese Patent Laid-open Publication (Kokai) No. 9-260314).

This method makes it easy to obtain flatness and thickness with higherprecision by utilizing a surface grinding step as shown in Process IV ofFIG. 11 (henceforth this process is also referred to as “surfacegrinding/double side polishing method”) instead of the lapping step ofProcess III. Moreover, since this method can easily be automated, italso makes possible to markedly reduce man-day or man-hour of workers.In addition, there has also been developed a method for simultaneouslygrinding both sides in order to eliminate undulation components of along period of 0.5 to 30 mm, which are generated in cutting with a wiresaw or an inner diameter slicer, and of which removal has hithertoconstituted a developmental object.

Moreover, the double side polishing means also has an advantage that itaffords flatness of higher precision compared with the conventional oneside polishing.

In the second surface grinding step of the aforementioned Process IV, ingeneral, the grinding processing is separately performed for the frontsurface and the back surface by using the same grinding stone or thesame grinding conditions. The processing traces on the front surface andthe back surface caused by the surface grinding are removed byperforming double side polishing.

By the way, although double side polished wafers produced in Process IVhaving the aforementioned advantages are excellent in flatness and soforth, they have a history that they have not accepted by devicemanufacturers so far. As the reason for this, the following threereasons can be mentioned.

First, when the presence of a wafer was confirmed by sensing the backsurface of the wafer during the device production process, ifcharacteristics of the back surface of the wafer such as glossiness andsurface roughness are changed from those of conventional ones, sensingsensitivity must be readjusted. Such readjustment for sensing must beperformed for the whole long process consisting of several tens ofsteps. Therefore, alteration of back surface characteristics shall beaccompanied by serious obstructions.

Secondly, the back surface of the wafer subjected to the double sidepolishing so that it should have a mirror surface suffers high contactarea ratio during back surface chucking, handling and so forth.Therefore, it is likely to receive contamination from a transportationsystem and so forth, and hence considerable improvement of cleanlinessdegree is required for the transportation system, and it constitutes anew technical problem. Moreover, it is also pointed out that sliding ofwafer occurs in transportation and alignment because the back surface ismade into a mirror surface.

Thirdly, it has also found that change of substantial surface area orcontact area of the wafer back surface may cause serious phenomena, forexample, temperature control may be deviated in the dry etching step,ion implantation step and so forth. In order to minimize the change ofprocess steps for device production, characteristics required for wafersmust be comparable to those of back surfaces of conventional wafersproduced by Process III (lapping/single side polishing method).Specifically, the back surface glossiness must be within the range of20-80% so that the back surface and the front surface can easily bedistinguished.

Furthermore, even if the double side polishing of Process IV (see FIG.11) is replaced with single side polishing, that is, even if anon-mirror surface subjected to etching treatment after grinding is lefton the wafer back surface, glossiness of the back surface would exceed80%, when the back surface is ground by using the same grinding stone orthe same grinding conditions as the surface grinding, in which theground surface is intended to be removed by polishing. Thus, the sameproblems as a mirror surface may be caused. This is exactly because thesurface grinding conditions are constituted by selection of grindingstone and grinding conditions optimized so that the surface can easilybe made into a mirror surface in the subsequent polishing step.

DISCLOSURE OF THE INVENTION

The present invention was accomplished in view of the problems of theconventional techniques mentioned above, and its major object is toprovide a method for producing a semiconductor wafer that has highflatness and back surface characteristics that can solve the problemsconcerning the back surface of a wafer having high glossiness for bothsides that is produced by the conventional surface grinding/double sidepolishing method and observed during the device production process, andto provide a semiconductor wafer having such characteristics.

In order to achieve the aforementioned object, the present inventionprovides a semiconductor wafer obtained by a process comprising at leastflattening both sides of the wafer by surface grinding means,eliminating a mechanically damaged layer by an etching treatment; andthen subjecting the wafer to a single side polishing treatment, whereina back surface of the wafer has glossiness in a range of 20-80%.

This wafer is a wafer that has excellent flatness for the both sides anddifferent surface conditions for the front surface and the back surface.For example, the front surface is finished as a mirror surface having aglossiness of 90-100%, and the back surface is finished to have aglossiness of 20-80%. Such a wafer surely eliminates the obstructionsobserved for wafers produced by the conventional surface grinding/doubleside polishing method during the device production process, for example,need of readjustment of sensing sensitivity, indistinguishability offront surface and back surface, separation failure after vacuum sucking,contamination during transportation, bad temperature control and soforth. Therefore, it can improve productivity and yield and markedlyreduce the cost of the device production process.

The present invention also provides a method for producing asemiconductor wafer, which comprises at least cutting out a wafer byslicing a semiconductor ingot, simultaneously grinding both of frontsurface and back surface of the wafer, then flattening the wafer bysurface grinding means for separately grinding the front surface and theback surface under different conditions, removing a mechanically damagedlayer by an etching treatment while maintaining flatness, and thensubjecting the wafer to a single side polishing treatment.

By such a process for producing a wafer comprising simultaneous surfacegrinding of both sides, separate surface grinding for each of frontsurface and back surface, etching and single side polishing, a waferhaving higher flatness can be produced with a lower cost compared withthe conventional lapping/single side polishing method. Further, a backsurface with desired low glossiness can easily be provided at low cost,in contrast to the drawback of the double side polished wafers, i.e.,the high glossiness of the back surface.

Therefore, a wafer processed by the method of the present invention is awafer having excellent flatness for the both sides, and differentroughness conditions for the front surface and the back surface. Forexample, it can be finished to have a mirror surface of high glossinessfor the front surface and desired low glossiness for the back surface.Such a wafer eliminates the obstructions in the device productionprocess caused by wafers produced through the conventional surfacegrinding/double side polishing method, for example, need of readjustmentof sensing sensitivity, indistinguishability of front surface and backsurface, bad separation after vacuum sucking, contamination duringtransportation, bad temperature control and so forth. Therefore,productivity, yield and cost of the device production process canmarkedly improved.

The present invention further provides a method for producing asemiconductor wafer, which comprises at least cutting out a wafer byslicing a semiconductor ingot, simultaneously grinding both of frontsurface and back surface of the wafer, then flattening the surface bysurface grinding means for grinding only the front surface under acondition different from the condition for the simultaneous grinding ofboth of the front surface and the back surface, removing a mechanicallydamaged layer by an etching treatment while maintaining flatness, andthen subjecting the wafer to a single side polishing treatment.

Since low glossiness of the back surface is attained also by thismethod, a wafer with high flatness can easily be produced at low costwithout significantly altering quality of the back surface compared withthose of conventional wafers. Therefore, the various obstructions in thedevice production process can be overcome, and productivity, yield andcost of devices can markedly be improved.

In this case, as the grinding means, there can be used a double headgrinding apparatus which can simultaneously grind both of the frontsurface and the back surface of the wafer, and a surface grindingapparatus which can grind the front surface and the back surface of thewafer with distinct conditions.

By using such a double-step grinding process, i.e., first simultaneouslygrinding both of the front surface and the back surface by a double headgrinding apparatus to obtain high flatness for the both sides, and thengrinding the front surface and the back surface with distinct conditionsto give difference of surface roughness for the front surface and backsurface, the wafer can be finished by the subsequent etching andpolishing treatments so as to have a highly glossy front surface and aback surface of low glossiness.

In this case, the wafer is preferably subjected to chamfering before thesurface grinding of the both sides.

By chamfering as described above, cracking and fractures such as chipsof wafers during the grinding and polishing can be prevented.

Further, the etching treatment of the aforementioned method ispreferably performed as wet etching using an alkali solution as anetching solution.

In the manner described above, the mechanically damaged layer of thewafer can be removed, while high flatness obtained by the double sidesurface grinding and the single side surface grinding is maintained, andthe polishing can efficiently be performed in the subsequent single sidepolishing treatment while the quality obtained after the grinding ismaintained. The etching treatment of the wafer can be performed in sucha degree that a minimum stock removal for only the mechanically damagedlayer should be removed.

As described above, a semiconductor wafer which has a front surfaceexhibiting high flatness and high glossiness and a back surfaceexhibiting glossiness within the range of 20-80% can easily be producedat low cost according to the present invention. Therefore, because awafer produced according to the present invention has the back surfacecharacteristics substantially comparable to those of a wafer obtained bythe conventional lapping/single side polishing method, it eliminates theneed for readjustment of sensor sensitivity for sensing the presence orabsence of the wafer, enables clear differentiation between the frontsurface and the back surface of wafer and surer temperature control, andreduces contamination of the back surface caused by the transportationsystem. Thus, it can sufficiently meet to the requirements for realizinghigher integration degree in the device production process, and it canimprove productivity and yield of the device production process, andmarkedly improve the cost.

BRIEF EXPLANATION OF THE DRAWINGS

FIG. 1 is a flowchart explaining a production process for producing asemiconductor wafer from a semiconductor ingot according to the presentinvention.

FIG. 2 is a flowchart explaining another production process forproducing a semiconductor wafer from a semiconductor ingot according tothe present invention.

FIG. 3 is a schematic explanatory view of an exemplary double headgrinding apparatus for double side grinding used in the presentinvention.

FIG. 4 is a schematic explanatory view of an exemplary surface grindingapparatus for single side grinding used in the present invention.

FIG. 5 is a graph representing the relationship between the kind ofgrinding stone used in the flattening step and glossiness of a waferobtained after etching.

FIG. 6 is a graph representing the relationship between the surfacegrinding conditions (rotation number of wafer and peripheral speed ofgrinding stone) and glossiness of a wafer obtained after etching.

FIG. 7 is a graph comparing flatness of a wafer obtained by the surfacegrinding/one side polishing method of the present invention and flatnessof a wafer obtained by the conventional lapping/single side polishingmethod or surface grinding/double side polishing method.

FIG. 8 is a schematic explanatory view of an exemplary single sidepolishing apparatus used in the present invention.

FIG. 9 is a schematic explanatory view of an exemplary vacuum suckingtype polishing apparatus used in the present invention.

FIG. 10 is a flowchart representing a production process of theconventional lapping/single side polishing method.

FIG. 11 is a flowchart representing a production process of theconventional surface grinding/double side polishing method.

BEST MODE FOR CARRYING OUT THE INVENTION

Embodiments of the present invention will be explained hereafter.However, the present invention is not limited to these.

The inventors of the present invention searched and investigated thecause of the fact that semiconductor wafers with mirror polishedsurfaces for the both sides were not accepted by device manufacturers.As a result, they found that such wafers have not been accepted becauseof the following history. That is, because such wafers have back surfacecharacteristics different from those of conventional wafers, theyrequire readjustment of sensing sensitivity in the device productionstep, and it constitutes a serious obstruction. Further, they sufferhigh contact area ratio during the back surface chucking and handling ofthem. Therefore, they are likely to suffer from contamination from thetransportation system and so forth, and there is caused a phenomenon ofdeviated temperature control during the device production process due tothe change of substantial surface area of the back surface. Thus, thedevice manufacturers must inevitably alter the process steps.

Therefore, the inventors of the present invention investigated andperformed experiments about the front and back surface characteristicsof wafers, and found that, if wafers have back surface glossiness withina range of 20 to 80%, they can obviate the aforementioned variousobstructions in the device production process as wafers having differentcharacteristics for the front surface and the back surface, which makesit possible to distinguish the front surface and the back surface, andalso found that wafers having such back surface glossiness as well ashigh flatness can be produced by using the double side grinding and thesingle side polishing in combination and optimizing the conditions ofthe combinatory process. Thus, they investigated various conditions forthe process, and accomplished the present invention.

First, Process I, which mainly consists of grinding and polishing steps,will be explained as an example of the method for producing asemiconductor wafer of the present invention by referring to theappended drawing. FIG. 1 is a flowchart for explaining the constructiveoutline of Process I.

Process I of the present invention mainly consists of the following sixsteps.

(1) A slicing step for cutting out a thin disk-like wafer from a singlecrystal ingot.

(2) A chamfering step for chamfering the sliced wafer.

(3) A flattening step for flattening the chamfered wafer, which consistsof a first grinding step for simultaneously grinding both sides of thewafer by a double head grinding apparatus under the same condition and asecond grinding step for separately grinding the front surface and theback surface of the wafer by a surface grinding apparatus. In the firstgrinding step, undulation components having a period of 0.5 to 30 mm ofthe wafer cut out by a wire saw or an inner diameter slicer areeliminated, and the both surfaces are finished so that they should havesubstantially the same characteristics. In the second grinding step, thefront surface and the back surface of the wafer are separately ground bya surface grinding apparatus under different conditions. For example,the back surface is ground first under a condition for obtaining lowglossiness, and then the front surface is ground under a condition forobtaining high glossiness.

(4) An etching step for eliminating grinding dusts and mechanicallydamaged layer produced during the flattening on the front surface andback surface of the wafer with an alkaline solution while maintainingthe flatness.

(5) A single side polishing step for performing mirror surfaceprocessing of the front surface of the wafer after the etching.

(6) A cleaning step for cleaning the wafer after the polishing treatmentand drying it.

As another example, steps of Process II will be explained by referringto FIG. 2.

Process II of the present invention mainly consists of the following sixsteps.

(1) A slicing step for cutting out a thin disk-like wafer from a singlecrystal ingot.

(2) A chamfering step for chamfering the sliced wafer.

(3) A flattening step for flattening the chamfered wafer, which consistsof a first grinding step for simultaneously grinding both sides of thewafer by a double head grinding apparatus under the same condition and asecond grinding step for grinding the front surface of the wafer by asurface grinding apparatus. In the first grinding step, undulationcomponents having a period of 0.5 to 30 mm of the wafer cut out by awire saw or an inner diameter slicer are eliminated under a grindingcondition for obtaining low glossiness, and the both sides are finishedso that they should have substantially the same characteristics. In thesecond grinding step, only the front surface is ground by a surfacegrinding apparatus under a condition for obtaining high glossiness,which is different from the condition for the simultaneous grinding ofthe both sides.

(4) An etching step for eliminating grinding dusts and mechanicallydamaged layer produced during the flattening on the front surface andback surface of the wafer with an alkaline solution while maintainingthe flatness.

(5) A single side polishing step for performing mirror surfaceprocessing of the front surface of the wafer after the etching.

(6) A cleaning step for cleaning the wafer after the polishing treatmentand drying it.

Now, the grinding apparatus and the polishing apparatus used for thepresent invention as well as processing conditions therefor will beexplained.

An example of the double head grinding apparatus used for the firstgrinding step of the flattening step is shown in FIG. 3.

This double head grinding apparatus 1 is one called horizontal typedouble head grinding apparatus, and comprises a left side grinding stone4 and a right side grinding stone 5, which are driven at a high speed bydriving motors 2 and 3 on the left and right sides, respectively. Anas-cut wafer, which is revolved by a non-illustrated rotating apparatus,is held on its both sides between the left and right grinding stones,and simultaneously ground for the both sides under the same condition.In this step, most of warpage and undulation of the as-cut wafer areeliminated so that the wafer should be processed to have high flatness,and thus a wafer not showing variation in thickness is formed.

Now, an example of the surface grinding apparatus for single sidegrinding used in the second grinding step as the post-grinding step isshown in FIG. 4. This surface grinding apparatus 10 is one calledvertical in-feed type surface grinder. In the grinding process usingthis apparatus, the aforementioned wafer W ground for the both sides isfixed on a first chucking plate 15 having a rotatable mechanism forsucking fixation, and the front surface or the back surface of the waferis ground with a first cup type grinding stone 13 driven by a firstdriving motor 11 at a high speed with the wafer rotating. Then, thewafer W is reversed, fixed on a second chucking plate 16 having the samemechanism as the first one, and the front surface or the back surface isground with a second grinding stone 14 driven by a second driving motor12 at a high speed. The both sides of the wafer can be ground underdifferent conditions by differentiating roughness of the first grindingstone 13 and the second grinding stone 14, or other conditions such asrotation speed.

In the second grinding step of Process II of the present invention, onlythe front surface may be ground by using a single shaft of theaforementioned surface grinding apparatus 10 under a condition differentfrom the condition of the first grinding.

Tests for selecting suitable grinding stones for the surface grinding asa grinding condition for obtaining a front surface of high glossinessand a back surface of low glossiness will be explained.

The names of the grinding stones are designations of manufacturers, anddo not represent their identities.

(Test 1)

The surface grinding was performed by changing the kind of grindingstone, and glossiness of back surface of each wafer was measured afteretching. The wafers used were cut out from an ingot, and the chamferedsilicon wafers had a diameter of 200 mm. The grinding stones used alsohad a diameter of 200 mm.

As for the surface grinding conditions, an in-feed type single sidesurface grinder was used for convenience with a workpiece rotationnumber of 3-5 rpm and a grinding stone rotation number of 2400-4800 rpm.These conditions are expressed as ranges, because a condition usuallyset for each of the grinding stones mentioned below as a standardcondition was used.

As for the kind of grinding stone, 6 kinds of grinding stones, Metal#600, Metal #800, Vitrifide #2,000, Vitrifide #3,000, Vitrifide #8,000and Resin #2,000, were used. All of the grinding stones used diamondabrasive grains.

Glossiness was measured at an incidence angle of 60° according to themethod standardized by JIS Z8741 and so forth. As a standard of mirrorsurface glossiness, the value of mirror polished wafer surface was used,which was taken as 100%. The back surface glossiness was 80-90%, whenResin #2,000 was used, which was a grinding stone for highly precisesurface grinding.

As a result, it was found that the target back surface glossiness of20-80% could be attained by using a grinding stone corresponding toVitrifide #2,000 or Vitrifide #3,000 as shown in FIG. 5.

Further, it was found that a grinding stone corresponding to Resin #2000or Vitrifide #8,000 could be used for the front surface grinding as ahigh count grinding stone.

(Test 2)

Then, regarding a mechanical condition of surface grinding, back surfaceglossiness after etching was investigated. The grinding stone used wasVitrifide #3,000. As for the surface grinding conditions, an in-feedtype single side surface grinder was used for convenience with a waferrotation number of 3-40 rpm and a grinding stone rotation number of2400-4800 rpm. The silicon wafers had a diameter of 200 mm. The grindingstone used had a diameter of 200 mm.

As a result, it was found that a smaller rotation number of the grindingstone and a higher rotation number of the wafer afforded lower backsurface glossiness as shown in FIG. 6.

From the results mentioned above, it was found that a ground surfacehaving desired back surface glossiness could be obtained by controlling(optimizing) the conditions of the grinding stone and mechanicalgrinding in addition to the selection of grinding stone in Test 1.

More precisely, the front surface grinding is preferably performed witha grinding stone of high count, which can reduce the surface roughness,so that a mirror surface can easily be obtained with a smaller polishingamount in the subsequent polishing step. It was found that a grindingstone corresponding to Resin #2000 or Vitrifide #8,000 is desirably usedas a grinding stone of high count, and a combination of a highergrinding stone rotation number and a lower wafer rotation number isparticularly suitable.

On the other hand, if the back surface is ground by using a grindingstone and grinding conditions similar to those of the grinding of thefront surface, the back surface glossiness becomes extremely high.

The relationship between the kind of grinding stone and glossiness afterthe etching was already discussed above. Turning to the amount ofetching, since the object of the etching is to remove the mechanicallydamaged layer, the etching amount should vary according to the variationof the depth of the mechanically damaged layer caused by difference ofthe grinding stone.

The depth of the mechanically damaged layer may be changed by count ofgrinding stone and hardness of bonding material for grinding stone andso forth, and it was confirmed by the inventor of the present inventionin this test that a deeper mechanically damaged layer was obtained inthe order of Metal #600>Metal #800>Vitrifide #2,000>Vitrifide#3,000>Resin #2,000>Vitrifide #8,000. That is, the amount of etching forremoving the mechanically damaged layer becomes larger with a coarsergrinding stone.

As represented in FIG. 5, glossiness after the etching exceeded 80% whenResin #2,000 was used for the surface grinding, and it is not preferredfor the back surface from the viewpoints of the sensor and temperaturecontrol used in the device production step.

Glossiness of the surface ground with grinding stone of Vitrifide #2,000or Vitrifide #3,000 after the etching is in the range of 20-60%. This isalmost the same as that of the back surface glossiness obtained by theconventional Process III (lapping/single side polishing method) afteretching, and causes almost no obstructions in the device productionstep.

The wet etching step used in the present invention must be able toremove the mechanically damaged layer formed on the wafer surface duringthe flattening step by the surface grinding means through chemicaletching while maintaining the flatness attained in the flattening stepas it is. A chemical solution used for this etching may degrade theflatness depending on its kind, stirring condition of the chemicalsolution and proceeding condition of the reaction during the etching.Therefore, the inventors of the present invention carefully repeatedexperiments, and found that an alkaline solution was extremely suitable,and a 45-50% aqueous solution of sodium hydroxide or potassium hydroxidewas desirable.

The subsequent one side polishing step is a step for polishing only oneside of a wafer having a stable thickness precision and flatnessprecision through a multi-step chemical mechanical polishing, whichwafer has undergone the previous slicing step, chamfering step,flattening step and etching step.

Various polishing schemes can be used for this single side polishing,and a method utilizing a polishing apparatus 20 shown in FIG. 8 can bementioned, for example. In this method, a wafer W is fixed on its backsurface to a holding disc 21 made from glass or ceramics set on arotatable body 26 with an adhesive 25 such as wax which enables easyremoval of the wafer in the subsequent cleaning step. A relativevelocity is imparted to a polishing pad 24, which is composed of apolyurethane foam layer or the like and adhered on a polishing turntable 27, with an imposed load, while a polishing agent 22 comprisingabrasive grains such as silica particles suspended in an alkali solutionis fed from a nozzle 23, to perform chemical mechanical polishing onlyfor the front surface of the wafer.

Further, in the method for single side polishing by using a vacuumsucking type polishing apparatus 30 shown in FIG. 9, a wafer W is fixedon its back surface to a vacuum sucking type rotatable holding member 31without using wax, and only the front surface of the wafer W issubjected to mechanical chemical polishing in the same manner asdescribed above.

There is also a method for holding a wafer on its back surface with asoft resin without using wax. Any of methods including those mentionedabove may be used for the present invention, and the method of singleside polishing is not limited to those mentioned above.

In the cleaning step, a cleaning treatment is performed by using SC-1mainly composed of aqueous ammonia and aqueous hydrogen peroxide, SC-2mainly composed of hydrochloric acid and aqueous hydrogen peroxide orthe like in order to remove the polishing agent and so forth adhered tothe surface of wafer obtained from the aforementioned single sidepolishing step and improve cleanliness of the front surface and backsurface of the wafer.

(Test 3)

Flatness of the final product obtained by Process I (surfacegrinding/single side polishing method) of the present invention wasmeasured, and the results are shown in FIG. 7 comparing with flatnessobtained by conventional production methods.

The conventional production methods were Process III (lapping/singleside polishing method) and Process IV (surface grinding/double sidepolishing method).

The flatness of the wafers was measured by an electrostatic capacitancetype thickness gage (U/G9700 produced by ADE Co.), and evaluated asvalues of SBIRmax (Site Back-side Ideal Range: a value standardized bySEMI standard M1 etc., cell size 25×25) and SFQR (Site Front-sideLeast-square Range).

While the flatness obtained by Process III was at levels of 0.44 μm interms of SBIRmax and 0.23 μm in terms of SFQR, the flatness obtained byProcess I was 0.19 μm in terms of SBIRmax and 0.12 μm in terms of SFQR,and thus markedly improved.

The values of flatness shown in FIG. 7 were represented with relativevalues based on the flatness obtained by Process III, which was takenas 1. These results show that the flatness obtained by the surfacegrinding/single side polishing method of the present invention was muchmore excellent as compared with that obtained by the conventionalmethods.

As explained above, by processing a wafer material according to thesteps of Process I or Process II, it can be finished to be asemiconductor wafer having desired high flatness, front surface of highglossiness and back surface of low glossiness.

The present invention is not limited to the embodiments described above.The above-described embodiments are mere examples, and those having thesubstantially same structure as that described in the appended claimsand providing the similar functions and advantages are included in thescope of the present invention.

For example, while silicon wafers having a diameter of 200 mm (8 inches)were processed in the embodiments of the present invention explainedabove, the present invention can sufficiently be applied to recentlyused wafers having a diameter of 250 mm (10 inches) to 400 mm (16inches) or larger.

Although the process steps of the present invention were exemplified byreferring to those mentioned in FIGS. 1 and 2, the steps of the presentinvention are not limited to those mentioned herein. In addition tothose steps, steps of heat treatment, cleaning and so forth may befurther added, or omission of some steps may be also possible.

What is claimed is:
 1. A semiconductor wafer obtained by a processcomprising at least flattening both sides of the wafer by surfacegrinding means, eliminating a mechanically damaged layer by an etchingtreatment, and then subjecting the wafer to a single side polishingtreatment, wherein only a front surface of the wafer is subjected to thesingle side polishing treatment and a back surface of the wafer hasglossiness in a range of 20-80%.
 2. A method for producing asemiconductor wafer, which comprises at least cutting out a wafer byslicing a semiconductor ingot, simultaneously grinding both of frontsurface and back surface of the wafer, then flattening the wafer bysurface grinding means for separately grinding the front surface and theback surface under different conditions, removing a mechanically damagedlayer by an etching treatment while maintaining flatness, and thensubjecting the wafer to a single side polishing treatment, wherein onlythe front surface of the wafer is subjected to the single side polishingtreatment.
 3. A method for producing a semiconductor wafer, whichcomprises at least cutting out a wafer by slicing a semiconductor ingot,simultaneously grinding both of front surface and back surface of thewafer, then flattening the surface by surface grinding means forgrinding only the front surface under a condition different from thecondition for the simultaneous grinding of both of the front surface andthe back surface, removing a mechanically damaged layer by an etchingtreatment while maintaining flatness, and then subjecting the wafer to asingle side polishing treatment, wherein only the front surface of thewafer is subjected to the single side polishing treatment.
 4. The methodfor producing a semiconductor wafer according to claim 2, wherein, asthe grinding means, there is used a double head grinding apparatus whichcan simultaneously grind both of the front surface and the back surfaceof the wafer, and a surface grinding apparatus which can grind the frontsurface and the back surface of the wafer with distinct conditions. 5.The method for producing a semiconductor wafer according to claim 3,wherein, as the grinding means, there is used a double head grindingapparatus which can simultaneously grind both of the front surface andthe back surface of the wafer, and a surface grinding apparatus whichcan grind the front surface and the back surface of the wafer withdistinct conditions.
 6. The method for producing a semiconductor waferaccording to claim 2, wherein the wafer is subjected to chamferingbefore the surface grinding of the both sides.
 7. The method forproducing a semiconductor wafer according to claim 3, wherein the waferis subjected to chamfering before the surface grinding of the bothsides.
 8. The method for producing a semiconductor wafer according toclaim 4, wherein the wafer is subjected to chamfering before the surfacegrinding of the both sides.
 9. The method for producing a semiconductorwafer according to claim 5, wherein the wafer is subjected to chamferingbefore the surface grinding of the both sides.
 10. The method forproducing a semiconductor wafer according to claim 2, wherein theetching treatment is wet etching using an alkali solution as an etchingsolution.
 11. The method for producing a semiconductor wafer accordingto claim 3, wherein the etching treatment is wet etching using an alkalisolution as an etching solution.
 12. The method for producing asemiconductor wafer according to claim 4, wherein the etching treatmentis wet etching using an alkali solution as an etching solution.
 13. Themethod for producing a semiconductor wafer according to claim 5, whereinthe etching treatment is wet etching using an alkali solution as anetching solution.
 14. The method for producing a semiconductor waferaccording to claim 6, wherein the etching treatment is wet etching usingan alkali solution as an etching solution.
 15. The method for producinga semiconductor wafer according to claim 7, wherein the etchingtreatment is wet etching using an alkali solution as an etchingsolution.
 16. The method for producing a semiconductor wafer accordingto claim 8, wherein the etching treatment is wet etching using an alkalisolution as an etching solution.
 17. The method for producing asemiconductor wafer according to claim 9, wherein the etching treatmentis wet etching using an alkali solution as an etching solution.
 18. Themethod for producing a semiconductor wafer according to claim 2, whereina back surface of the wafer has a glossiness in a range of 20-80% uponsubjecting the wafer to the single side polishing treatment.